skidl package

SKiDL: A Python-Based Schematic Design Language

SKiDL is a module that allows you to compactly describe electronic circuits using Python. The resulting Python program performs electrical rules checking for common mistakes and outputs a netlist that serves as input to a PCB layout tool.

SKiDL reads in libraries of electronic parts and converts them into Python objects. The objects can be instantiated into components and connected into a circuit using net objects. The circuit can be checked for common errors automatically by the ERC (electrical rules checking) module, and then a netlist can be generated for input to a PCB layout tool.

Full documentation is available at https://devbisme.github.io/skidl

Here’s a simple example of SKiDL used to describe a circuit with a resistor and LED in series powered by a battery:

import skidl from skidl import *

# Create a resistor and LED. r1 = Part(‘Device’, ‘R’, value=’1K’) # Create a 1K resistor. led = Part(‘Device’, ‘LED’) # Create a LED.

# Create a battery. bat = Part(‘Device’, ‘Battery_Cell’)

# Connect the components. vcc = Net(‘VCC’) # Net for VCC. gnd = Net(‘GND’) # Net for ground. vcc += bat[‘+’] # Connect the battery positive terminal to VCC. gnd += bat[‘-’] # Connect the battery negative terminal to GND. vcc += r1[1] # Connect one end of the resistor to VCC. r1[2] += led[‘A’] # Connect the other end to the LED anode. led[‘K’] += gnd # Connect the LED cathode to GND.

# Output the netlist to a file. generate_netlist()

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