skidl.schematics.node module

class skidl.schematics.node.Node(circuit=None, tool_module=None, filepath='.', top_name='', title='', flatness=0.0)[source]

Bases: Placer, Router

Data structure for holding information about a node in the circuit hierarchy.

add_circuit(circuit)[source]

Add parts in circuit to node and its children.

Parameters:

circuit (Circuit) – Circuit object.

add_part(part, level=0)[source]

Add a part to the node at the appropriate level of the hierarchy.

Parameters:
  • part (Part) – Part to be added to this node or one of its children.

  • level (int, optional) – The current level (depth) of the node in the hierarchy. Defaults to 0.

add_terminal(net)[source]

Add a terminal for this net to the node.

Parameters:

net (Net) – The net to be added to this node.

calc_bbox()[source]

Compute the bounding box for the node in the circuit hierarchy.

collect_stats(**options)[source]

Return comma-separated string with place & route statistics of a schematic.

external_bbox()[source]

Return the bounding box of a hierarchical sheet as seen by its parent node.

filename_sz = 20
find_node_with_part(part)[source]

Find the node that contains the part based on its hierarchy.

Parameters:

part (Part) – The part being searched for in the node hierarchy.

Returns:

The Node object containing the part.

Return type:

Node

flatten(flatness=0.0)[source]

Flatten node hierarchy according to flatness parameter.

Parameters:

flatness (float, optional) – Degree of hierarchical flattening (0=completely hierarchical, 1=totally flat). Defaults to 0.0.

Create hierarchical sheets for the node and its child nodes. Complexity (or size) of a node and its children is the total number of part pins they contain. The sum of all the child sizes multiplied by the flatness is the number of part pins that can be shown on the schematic page before hierarchy is used. The instances of each type of child are flattened and placed directly in the sheet as long as the sum of their sizes is below the slack. Otherwise, the children are included using hierarchical sheets. The children are handled in order of increasing size so small children are more likely to be flattened while large, complicated children are included using hierarchical sheets.

get_internal_nets()[source]

Return a list of nets that have at least one pin on a part in this node.

get_internal_pins(net)[source]

Return the pins on the net that are on parts in the node.

Parameters:

net (Net) – The net whose pins are being examined.

Returns:

List of pins on the net that are on parts in this node.

Return type:

list

internal_bbox()[source]

Return the bounding box for the circuitry contained within this node.

name_sz = 40