A cheatsheet for SKiDL 2.1.0 is now available. Print it out, laminate it, and keep it handy for all your SKiDL coding needs!

Today marks the release of SKiDL version 2.1.0. The increment in the minor version number indicates that this release includes new features and improvements while maintaining backward compatibility with version 2.0.0.

Here are the changes in 2.1.0:

• netlist_to_skidl now generates hierarchical SKiDL code that …

After three years since version 1.0, today marks the release of SKiDL version 2.0.0. The increment in the major version number indicates that this release is not backward compatible with previous versions, so some SKiDL code may not work if:

1. It relies on Python 2 (which is …

You can finally generate editable schematics from your SKiDL code.

It's been nearly two years since the last release. The 1.2.0 release has these user-facing changes:

• Something that has been requested for years: SKiDL can now generate an editable schematic from a Circuit object. (Currently only works for KiCad V5.)
• The Group object allows you to create hierarchy …

ChatGPT was released late last year, and GPT4 dropped last week. These large language models (LLMs) offer some intriguing possibilities. I had a Twitter conversation about them with @alexandrosM that started like this:

So I described the simplest thing I could think of - a voltage divider - and asked ChatGPT to …

It's been nearly half a year since the big 1.0 release. This release only has a few user-facing changes:

• A KiCad PCB file can now be created directly using the generate_pcb() function instead of outputing a netlist that's imported into PCBNEW.
• Part templates can be created with the PartTmplt …

Nearly a year after 0.0.30, today marks the release of SKiDL version 1.0.0. But why assign such an exalted milestone to this release given the relative paucity of new features, most of them mundane (with the possible exception of automatic generation of schematics)?

Because I said …

Everybody wants ERC. Everybody hates ERC.

Electrical rules checking (ERC) looks for errors in how your circuit is constructed. It's like running lint, but for hardware. And as with lint, you get a whole bunch of warnings that don't matter but which obscure the ones that do.

SKiDL tries to …

Up to now, SKiDL supported hierarchy by applying the @subcircuit decorator to a Python function:

@subcircuit
def analog_average(in1, in2, avg):
    """Output the average of the two inputs."""

    # Create two 1K resistors.
    r1, r2 = 2 * Part('Device', 'R', value='1K', dest=TEMPLATE)

    # Each input connects thru a resistor to the …