skidl.schematics.snap module

Backend-agnostic snap geometry for schematic generation.

After placement+routing, two-pin parts (resistors, caps, LEDs, …) are “snapped” so one of their pins lands exactly on the pin of a connected multi-pin part (an IC) or on the free pin of an already-snapped two-pin part. This turns a sea of labelled stubs into directly-touching pins and short wires, which the KiCad emitter then renders without redundant labels.

The geometry here is independent of any particular EDA tool: it operates on SKiDL Part/Pin/Net objects and SchNode trees, mutating part.tx and recording wire/suppression hints on the node:

node._tjunction_wires list[(x1,y1,x2,y2)] (mils, pre-sheet-tx) node._tjunction_suppressed_pins set[id(pin)] node._power_cap_wires list[(x1,y1,x2,y2)] (mils, pre-sheet-tx) node._power_cap_junctions list[Point] (mils, pre-sheet-tx) node._power_cap_suppressed_pins set[id(pin)]

The tool-specific emitter (e.g. kicad9/sexp_schematic.py) reads these attributes to draw wires and suppress the corresponding pin labels.

skidl.schematics.snap.snap_two_pin_parts(node)

Snap 2-pin parts onto their connected IC or already-snapped part pins.

Pass 1: Snap onto IC pins (parts with >2 pins). Each IC pin only accepts one snapped part; extras keep their labels.

Pass 2+: Iteratively snap remaining 2-pin parts onto the free pins of already-snapped 2-pin parts, building chains (e.g. IC <- R <- LED).

Pass 3: Stack remaining 2-pin parts onto already-occupied IC pins, extending perpendicular to the first snapped part. Handles nets shared between multiple 2-pin parts (e.g. switch + pull-down on the same IC input).

Recurses into child nodes first.